Intel has confirmed through an email with a Linux kernel developer that its next server processor, the 4th Generation Intel Xeon known as "Sapphire Rapids", will use Golden Cove cores, and not Willow Cove as expected. In other words, it will use the same high-performance cores built into Alder Lake, its consumer counterpart, but will integrate a hybrid design to add energy-efficient cores.

This microarchitecture will deliver a 20 percent IPC performance improvement over Cypress Cove (Rocket Lake-S). While compared to Skylake, this improvement is 50 percent per core. Each Golden Cove core, at least in Alder Lake, has access to 32 KB of L1l cache and 48 KB L1D, along with 1280 KB of L2 cache and 3072 KB of L3 cache. All this adds up to a total of 24 MB of L3 cache.

According to the latest leaks, the Sapphire Rapids processors will reach a 10nm SuperFin manufacturing process boasting a chipset design where a total of 80 of these Golden Cove cores would be included along with no less than 64 GB of integrated HBM2 memory. Along with them, access to DDR5 @ 4800 MHz memory in Octa (8) -Channel configuration is added along with the PCI-Express 5.0 interface and the CXL 1.1 (Compute Express Link) interconnection.

Link: https://elchapuzasinformatico.com/2021/05/los-intel-xeon-sapphire-rapids-tendran-hasta-80-nucleos-golden-cove-para-cambiar-las-reglas-del-juego/